Currently, in semiconductor manufacturing, a semiconductor device is fabricated by depositing multiple layers successively. In actual semiconductor manufacturing, a method is known wherein instead of measuring positions of alignment marks formed in a layer prior to exposure, marks are formed in the multiple layers and alignment is performed by measuring positions of the marks in multiple layers.
As described in Japanese Patent Laid-Open No. 7-321012, it is suggested that when forming a layer on a substrate, the layer is formed after measuring positions of marks formed in each of at least two layers formed prior to the layer, based on measurement of the mark positions in each of said layers.
In the past, there has been a problem that, in measuring alignment marks formed in each layer, the measurement accuracy is degraded due to manufacturing processes such as the physical feature and resist application condition of each alignment mark.